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D-Matrix adopts NVLink Fusion for rack-scale AI inference

What happened

D-Matrix plans to launch its first Raptor-based MGX systems by the fourth quarter of 2027.

Source

Article excerpt

Highlighted: the sentence this signal was extracted from

The AI chip startup will plug its next-gen Raptor XPUs into NVIDIA's rack-scale fabric, targeting ultra-low-latency workloads by late 2027 Share Building your own AI chip is hard. Getting that chip into production racks at scale is arguably harder. D-Matrix, the inference-focused semiconductor startup, just announced a shortcut: it's wiring its next-generation Raptor XPUs directly into NVIDIA 's NVLink Fusion interconnect, gaining access to the entire rack-scale infrastructure that NVIDIA has spent years perfecting. The partnership means Raptor accelerators will connect through NVIDIA's sixth-generation NVLink fabric and slot into MGX reference architecture racks. Initial Raptor-based MGX systems are projected for 2027, with first units expected by Q4 of that year. NVLink Fusion, which NVIDIA introduced in 2025, lets third-party XPUs and CPUs tap into NVLink's low-latency links without building their own networking stack from scratch. The integration supports rack-scale configurations that can accommodate up to 144 Raptor accelerators within a single all-to-all NVLink domain. NVLink Fusion delivers 3x lower XPU-to-XPU latency compared to traditional Ethernet interconnects. Each XPU can access up to 3 TB/s of bandwidth through the sixth-generation NVLink fabric. D-Matrix CEO Sid Sheth has emphasized that the collaboration accelerates deployment for ultra-low-latency inference...

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Extracted by Autobound

From the Signal API record
Event
Launch

What this signalsA launch often needs new go-to-market and support spend.

Product
Raptor-based MGX systems
Takes effect
Oct 1, 2027

The full record

From the Signal API record

Topics and mentions

Product tags

  • general technology

Extraction

Confidence
90%
Detected
Sep 10, 2026
signal_type
news
signal_subtype
launches

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This page shows a preview. The full news record in the Signal API and MCP can also have these 8 fields. Some fields are empty for some signals.

Company

  • linkedin_urlValue in the API
  • industriesValue in the API
  • employee_count_lowValue in the API
  • employee_count_highValue in the API
  • revenueValue in the API
  • descriptionValue in the API

Signal

  • signal_nameValue in the API
  • associationValue in the API
Show the full JSONThe record on this page and the API request

GET /v1/signals/90c04253-024b-0e4e-f837-5e7e9b7e8245 returns this record as JSON. POST /v1/companies/enrich returns every signal for d-matrix.ai.

{
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  "signal_type": "news",
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  "detected_at": "2026-09-10T15:06:14+00:00",
  "company": {
    "name": "d-Matrix",
    "domain": "d-matrix.ai"
  },
  "data": {
    "url": "https://cryptobriefing.com/d-matrix-nvlink-fusion-rack-scale-inference/",
    "title": "D-Matrix adopts NVLink Fusion for rack-scale AI inference - Crypto Briefing",
    "excerpt": "The AI chip startup will plug its next-gen Raptor XPUs into NVIDIA's rack-scale fabric, targeting ultra-low-latency workloads by late 2027 Share Building your own AI chip is hard. Getting that chip into production racks at scale is arguably harder. D-Matrix, the inference-focused semiconductor startup, just announced a shortcut: it’s wiring its next-generation Raptor XPUs directly into NVIDIA ’s NVLink Fusion interconnect, gaining access to the entire rack-scale infrastructure that NVIDIA has spent years perfecting. The partnership means Raptor accelerators will connect through NVIDIA’s sixth-generation NVLink fabric and slot into MGX reference architecture racks. Initial Raptor-based MGX systems are projected for 2027, with first units expected by Q4 of that year. NVLink Fusion, which NVIDIA introduced in 2025, lets third-party XPUs and CPUs tap into NVLink’s low-latency links without building their own networking stack from scratch. The integration supports rack-scale configurations that can accommodate up to 144 Raptor accelerators within a single all-to-all NVLink domain. NVLink Fusion delivers 3x lower XPU-to-XPU latency compared to traditional Ethernet interconnects. Each XPU can access up to 3 TB/s of bandwidth through the sixth-generation NVLink fabric. D-Matrix CEO Sid Sheth has emphasized that the collaboration accelerates deployment for ultra-low-latency inference...",
    "product": "Raptor-based MGX systems",
    "summary": "D-Matrix plans to launch its first Raptor-based MGX systems by the fourth quarter of 2027.",
    "planning": true,
    "image_url": "https://static.cryptobriefing.com/wp-content/uploads/2026/09/10110608/library-d-matrix-adopts-nvlink-fusion-for-rack-scale-ai-inferenc-800x450.png",
    "confidence": 0.9,
    "product_data": {
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    "published_at": "2026-09-10T15:06:14Z",
    "effective_date": "2027-10-01",
    "article_sentence": "Initial Raptor-based MGX systems are projected for 2027, with first units expected by Q4 of that year."
  }
}

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