Intel was granted a patent for improved capacitors in semiconductor devices.

{
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  "signal_type": "patents-company",
  "signal_subtype": "patentGrant",
  "detected_at": "2026-10-30T01:12:03+00:00",
  "company": {
    "name": "Intel",
    "domain": "intel.com"
  },
  "data": {
    "cpc": [
      {
        "code": "H10W 20/496"
      },
      {
        "code": "H10D 1/696",
        "label": "Inorganic electric semiconductor devices (2025 CPC reorg of parts of H01L)"
      },
      {
        "code": "H10W 44/20"
      },
      {
        "code": "H10W 44/251"
      }
    ],
    "tags": [
      "Intellectual Property",
      "Research & Development",
      "Engineering",
      "Consumer Technology"
    ],
    "detail": "In October 2026 Intel patented a compact capacitor design for semiconductor chips, supporting power management and circuit performance in processors and other electronic devices.",
    "summary": "Intel was granted a patent for improved capacitors in semiconductor devices.",
    "event_at": "2026-10-27",
    "inventors": [
      {
        "name": "Michael Langenbuch",
        "status": "unresolved",
        "is_primary": true
      },
      {
        "name": "Carla Moran Guizan",
        "status": "unresolved",
        "is_primary": false
      },
      {
        "name": "Mamatha Yakkegondi Virupakshappa",
        "status": "resolved",
        "is_primary": false,
        "linkedin_url": "https://www.linkedin.com/in/mamatha-yakkegondi-virupakshappa-b9b234102"
      },
      {
        "name": "Roshini Sachithanandan",
        "status": "resolved",
        "is_primary": false,
        "linkedin_url": "https://www.linkedin.com/in/roshini-sachithanandan-03039b25"
      },
      {
        "name": "Philipp Riess",
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        "linkedin_url": "https://www.linkedin.com/in/riess-philipp-25136061"
      },
      {
        "name": "Jonathan Jensen",
        "status": "resolved",
        "is_primary": false,
        "linkedin_url": "https://www.linkedin.com/in/jonathan-jensen-2910646"
      },
      {
        "name": "Peter Baumgartner",
        "status": "resolved",
        "is_primary": false,
        "linkedin_url": "https://www.linkedin.com/in/peter-rf-tech"
      },
      {
        "name": "Georg Seidemann",
        "status": "resolved",
        "is_primary": false,
        "linkedin_url": "https://www.linkedin.com/in/georg-seidemann-88b8a195"
      }
    ],
    "event_kind": "grant_date",
    "grant_date": "2026-10-27",
    "source_url": "https://patents.google.com/patent/US12777923",
    "cpc_primary": {
      "code": "H10W 20/496"
    },
    "patent_title": "Methods and apparatus for implementing capacitors in semiconductor devices",
    "patent_number": "US12777923",
    "uspto_assignee": "Intel Corporation",
    "patent_abstract": "Methods and apparatus are disclosed for implementing capacitors in semiconductor devices. An example semiconductor die includes a first dielectric material disposed between a first metal interconnect and a second metal interconnect; and a capacitor positioned within a via extending through the first dielectric material between the first and second metal interconnects, the capacitor including a second dielectric material disposed in the via between the first and second metal interconnects.",
    "precision_class": "structural",
    "invention_explanation": "A chip design that places a capacitor inside a connection hole between metal wiring layers, using insulating material to store electrical charge in less space.",
    "technologies_mentioned": [
      "semiconductor capacitors",
      "integrated circuits",
      "metal interconnects",
      "dielectric materials"
    ]
  }
}

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  -H "X-API-KEY: $AUTOBOUND_API_KEY" \
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  -d '{"domain":"intel.com","limit":20}'