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MicronIn development

Micron plans to use wafer bonding and High-NA EUV for next-gen DRAM - company also developing vertical high-bandwidth memory and vertical edge inference memory integrated...

Source: Autobound Signal API · 119 signals tracked for Micron · updated

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What happened

Micron is developing vertical high-bandwidth memory (vHBM) to be integrated directly on top of processors.

Source

Article excerpt

Highlighted: the sentence this signal was extracted from

Having jettisoned 4F 2 memory cells from its roadmap, Micron must use different methods to continue scaling its DRAM devices in the coming years to keep up with rivals planning to use smaller DRAM transistors towards the end of the decade. Instead, Micron intends to introduce wafer bonding with its upcoming 1ε DRAM process technology and adopt High-NA EUV lithography for subsequent generations. Meanwhile, the company is developing new types of memory, including vertical high-bandwidth memory (vHBM) and vertical edge inference memory (vEIM), which will be integrated directly on top of processors. "DRAM is nearing atomic limits at this point," said Scott DeBoer, president and chief technology and products officer at Micron, during the company's event this week. "Although we have confidence in several more planar nodes, we are very focused on making sure that we introduce 3D DRAM at the optimal time from a cost and performance point of view." Micron's current 1γ DRAM process is already in high-volume manufacturing, whereas its successor, 1δ, is scheduled to enter volume production in the second half of 2027. The latter promises a mid-20% increase in bit density and is optimized for future AI memory products, including HBM5, vHBM, and vEIM. Beyond 1δ, Micron plans to introduce wafer bonding with its 1ε process, which is currently under development. However, the company has not...

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Extracted by Autobound

From the Signal API record
Event
In development

What this signalsWork in development often leads to new buying for tools, data and services.

Product
vertical high-bandwidth memory

The full record

From the Signal API record

Topics and mentions

Product tags

  • general technology
  • future tech
  • data

Extraction

Confidence
95%
Detected
Oct 26, 2026
signal_type
news
signal_subtype
is_developing

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The API returns more than this page shows

This page shows a preview. The full news record in the Signal API and MCP can also have these 8 fields. Some fields are empty for some signals.

Company

  • linkedin_urlValue in the API
  • industriesValue in the API
  • employee_count_lowValue in the API
  • employee_count_highValue in the API
  • revenueValue in the API
  • descriptionValue in the API

Signal

  • signal_nameValue in the API
  • associationValue in the API
Show the full JSONThe record on this page and the API request

GET /v1/signals/142ce33b-cee2-e963-5013-3dad7e8ae039 returns this record as JSON. POST /v1/companies/enrich returns every signal for micron.com.

{
  "signal_id": "142ce33b-cee2-e963-5013-3dad7e8ae039",
  "signal_type": "news",
  "signal_subtype": "is_developing",
  "detected_at": "2026-10-26T14:00:00+00:00",
  "company": {
    "name": "Micron",
    "domain": "micron.com"
  },
  "data": {
    "url": "https://www.tomshardware.com/pc-components/dram/micron-plans-to-use-wafer-bonding-and-high-na-euv-for-next-gen-dram-company-also-developing-vertical-high-bandwidth-memory-and-vertical-edge-inference-memory-integrated-directly-on-top-of-processors",
    "title": "Micron plans to use wafer bonding and High-NA EUV for next-gen DRAM - company also developing vertical high-bandwidth memory and vertical edge inference memory integrated directly on top of processors - Tom's Hardware",
    "excerpt": "Having jettisoned 4F 2 memory cells from its roadmap , Micron must use different methods to continue scaling its DRAM devices in the coming years to keep up with rivals planning to use smaller DRAM transistors towards the end of the decade. Instead, Micron intends to introduce wafer bonding with its upcoming 1ε DRAM process technology and adopt High-NA EUV lithography for subsequent generations. Meanwhile, the company is developing new types of memory, including vertical high-bandwidth memory (vHBM) and vertical edge inference memory (vEIM), which will be integrated directly on top of processors. \"DRAM is nearing atomic limits at this point,\" said Scott DeBoer, president and chief technology and products officer at Micron, during the company's event this week. \"Although we have confidence in several more planar nodes, we are very focused on making sure that we introduce 3D DRAM at the optimal time from a cost and performance point of view.\" Micron's current 1γ DRAM process is already in high-volume manufacturing, whereas its successor, 1δ, is scheduled to enter volume production in the second half of 2027. The latter promises a mid-20% increase in bit density and is optimized for future AI memory products, including HBM5, vHBM, and vEIM. Beyond 1δ, Micron plans to introduce wafer bonding with its 1ε process, which is currently under development. However, the company has not...",
    "product": "vertical high-bandwidth memory",
    "summary": "Micron is developing vertical high-bandwidth memory (vHBM) to be integrated directly on top of processors.",
    "planning": true,
    "image_url": "https://cdn.mos.cms.futurecdn.net/NXXMYUVnvu4xUCtWoHqW48-2560-80.jpg",
    "confidence": 0.95,
    "product_data": {
      "name": "vertical high-bandwidth memory",
      "full_text": "vertical high-bandwidth memory (vHBM)",
      "fuzzy_match": false
    },
    "product_tags": [
      "general_technology",
      "future_tech",
      "data"
    ],
    "published_at": "2026-10-26T14:00:00Z",
    "article_sentence": "Meanwhile, the company is developing new types of memory, including vertical high-bandwidth memory (vHBM) and vertical edge inference memory (vEIM), which will be integrated directly on top of processors."
  }
}

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