Micron was granted a patent for improved semiconductor conductive vias

{
  "signal_id": "062bf38b-0fa0-54e3-a07a-36bbf126fb9c",
  "signal_type": "patents-company",
  "signal_subtype": "patentGrant",
  "detected_at": "2026-10-14T16:28:44+00:00",
  "company": {
    "name": "Micron",
    "domain": "micron.com"
  },
  "data": {
    "cpc": [
      {
        "code": "H10W 20/0698"
      },
      {
        "code": "H10W 20/083"
      },
      {
        "code": "H10W 20/20"
      }
    ],
    "tags": [
      "Intellectual Property",
      "Research & Development",
      "Manufacturing Operations",
      "Engineering"
    ],
    "detail": "In October 2026 Micron patented a semiconductor manufacturing process for building insulated electrical connections in memory and other chip devices.",
    "summary": "Micron was granted a patent for improved semiconductor conductive vias",
    "event_at": "2026-10-13",
    "inventors": [
      {
        "name": "Trupti D. Gawai",
        "status": "resolved",
        "is_primary": true,
        "linkedin_url": "https://www.linkedin.com/in/trupti-gawai-69319a30"
      },
      {
        "name": "David A. Kewley",
        "status": "unresolved",
        "is_primary": false
      },
      {
        "name": "Aaron M. Lowe",
        "status": "unresolved",
        "is_primary": false
      },
      {
        "name": "Radhakrishna Kotti",
        "status": "resolved",
        "is_primary": false,
        "linkedin_url": "https://www.linkedin.com/in/radhakrishna-kotti-phd-5aa3121a"
      },
      {
        "name": "David S. Pratt",
        "status": "resolved",
        "is_primary": false,
        "linkedin_url": "https://www.linkedin.com/in/david-pratt-4a5661b1"
      }
    ],
    "event_kind": "grant_date",
    "grant_date": "2026-10-13",
    "source_url": "https://patents.google.com/patent/US12765344",
    "cpc_primary": {
      "code": "H10W 20/0698"
    },
    "patent_title": "Methods for forming conductive vias, and associated devices and systems",
    "patent_number": "US12765344",
    "uspto_assignee": "Micron Technology, Inc.",
    "patent_abstract": "Methods of manufacturing semiconductor devices, and associated systems and devices, are disclosed herein. In some embodiments, a method of manufacturing a semiconductor device includes forming an opening in an insulative material at least partially over an electrically conductive feature. The method can further include forming a ring of electrically non-conductive material extending at least partially about a sidewall of the insulative material that defines the opening. The method can further include removing a portion of the ring to form an opening over the electrically conductive feature, and then depositing an electrically conductive material into the opening in the ring to form a conductive via electrically coupled to the electrically conductive feature.",
    "precision_class": "structural",
    "invention_explanation": "A fabrication method that surrounds a chip connection opening with a non-conductive ring to help form a more reliable conductive pathway.",
    "technologies_mentioned": [
      "semiconductor fabrication",
      "conductive vias",
      "memory devices"
    ]
  }
}

curl https://signals.autobound.ai/v1/signals/062bf38b-0fa0-54e3-a07a-36bbf126fb9c \
  -H "X-API-KEY: $AUTOBOUND_API_KEY"

curl -X POST https://signals.autobound.ai/v1/companies/enrich \
  -H "X-API-KEY: $AUTOBOUND_API_KEY" \
  -H "Content-Type: application/json" \
  -d '{"domain":"micron.com","limit":20}'