SambaNova Systems was granted a patent for scannable SRAM.

{
  "signal_id": "5e574d73-20ef-582c-8b55-0060a1248b04",
  "signal_type": "patents-company",
  "signal_subtype": "patentGrant",
  "detected_at": "2026-09-30T17:27:59+00:00",
  "company": {
    "name": "SambaNova",
    "domain": "sambanova.ai"
  },
  "data": {
    "cpc": [
      {
        "code": "G11C 11/417"
      },
      {
        "code": "G11C 11/41"
      },
      {
        "code": "G11C 29/32"
      },
      {
        "code": "G11C 2029/3202"
      }
    ],
    "tags": [
      "Intellectual Property",
      "Research & Development",
      "Engineering",
      "Quality Assurance"
    ],
    "detail": "In September 2026 SambaNova Systems patented memory circuitry for testing and diagnosing SRAM in advanced computing hardware.",
    "summary": "SambaNova Systems was granted a patent for scannable SRAM.",
    "event_at": "2026-09-29",
    "inventors": [
      {
        "name": "Paul Jordan",
        "status": "unresolved",
        "is_primary": true
      },
      {
        "name": "Thomas Ziaja",
        "status": "unresolved",
        "is_primary": false
      }
    ],
    "event_kind": "grant_date",
    "grant_date": "2026-09-29",
    "source_url": "https://patents.google.com/patent/US12749528",
    "cpc_primary": {
      "code": "G11C 11/417"
    },
    "patent_title": "Scannable SRAM",
    "patent_number": "US12749528",
    "uspto_assignee": "SambaNova Systems, Inc.",
    "patent_abstract": "A scannable memory cell includes an amplifier configured in a positive feedback loop, with the amplifier output coupled to the scan output SO terminal. The memory cell further has a data access switch coupled between the amplifier output and the bit line BL terminal, and a scan access switch coupled between the amplifier input and the scan input SI terminal. Control terminals of both switches are coupled to the word line WL and scan control SC line terminals, respectively. Some implementations further include a scan loop switch, controlled by the scan control SC terminal, and configured to interrupt the positive feedback loop when the memory cell is in scan mode. Other implementations include a scan out SO buffer or inverter with increased drive strength.",
    "precision_class": "structural",
    "invention_explanation": "An SRAM cell that adds a scan path, allowing stored data and circuit behavior to be checked without disrupting normal memory access.",
    "technologies_mentioned": [
      "SRAM",
      "memory testing",
      "semiconductor circuits"
    ]
  }
}

curl https://signals.autobound.ai/v1/signals/5e574d73-20ef-582c-8b55-0060a1248b04 \
  -H "X-API-KEY: $AUTOBOUND_API_KEY"

curl -X POST https://signals.autobound.ai/v1/companies/enrich \
  -H "X-API-KEY: $AUTOBOUND_API_KEY" \
  -H "Content-Type: application/json" \
  -d '{"domain":"sambanova.ai","limit":20}'