AMD was granted a patent for criticality-aware memory power management

{
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  "signal_type": "patents-company",
  "signal_subtype": "patentGrant",
  "detected_at": "2026-09-30T17:16:12+00:00",
  "company": {
    "name": "AMD",
    "domain": "amd.com"
  },
  "data": {
    "cpc": [
      {
        "code": "G06F 9/4881",
        "label": "Electric digital data processing"
      },
      {
        "code": "G06F 1/3206",
        "label": "Electric digital data processing"
      },
      {
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        "label": "Electric digital data processing"
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        "label": "Electric digital data processing"
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    "tags": [
      "Intellectual Property",
      "Research & Development",
      "Energy / Power",
      "Enterprise Architecture"
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    "detail": "In September 2026 AMD patented power-saving technology for servers and computing systems that reallocates memory power when processors need it most.",
    "summary": "AMD was granted a patent for criticality-aware memory power management",
    "event_at": "2026-09-29",
    "inventors": [
      {
        "name": "Yasuko Eckert",
        "status": "resolved",
        "is_primary": true,
        "linkedin_url": "https://www.linkedin.com/in/yasuko-eckert-86620546"
      }
    ],
    "tech_area": "software / computing",
    "event_kind": "grant_date",
    "grant_date": "2026-09-29",
    "source_url": "https://patents.google.com/patent/US12748620",
    "cpc_primary": {
      "code": "G06F 9/4881",
      "label": "Electric digital data processing"
    },
    "patent_title": "Dynamic memory power capping with criticality awareness",
    "patent_number": "US12748620",
    "uspto_assignee": "Advanced Micro Devices, Inc.",
    "patent_abstract": "Systems, apparatuses, and methods for reducing memory power consumption without substantial performance impact by selectively delaying non-critical memory requests are disclosed. A system management unit transfers an amount of power allocated from a memory subsystem to other component(s) responsive to detecting a first condition. In one embodiment, the first condition is detecting one or more processors having tasks to execute. In response to the system management unit transferring the amount of power from the memory subsystem to one or more processors, a memory controller delays non-critical memory requests while performing critical memory requests to memory.",
    "precision_class": "structural",
    "invention_explanation": "A controller saves energy by postponing lower-priority memory requests while keeping urgent requests moving, then shifting unused memory power to active processors.",
    "technologies_mentioned": [
      "memory power management",
      "processor scheduling",
      "system management units"
    ]
  }
}

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curl -X POST https://signals.autobound.ai/v1/companies/enrich \
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