US patent US12751240
Multi-target design for in-situ analysis of semiconductor fabrication process
Abstract
A system can provide in-situ analysis of at least some of a plurality of targets simultaneously during a fabrication process. The system can include a semiconductor processing tool having a chamber. The system can also include a sample arranged within the chamber, the sample having the plurality of targets with different feature orientations and/or feature geometries. The semiconductor processing tool can be configured to perform the fabrication process on the sample. Additionally, the system can include a metrology tool integrated with the semiconductor processing tool. The metrology tool can provide the in-situ analysis of at least some of the plurality of targets simultaneously during the fabrication process.