TSMC was granted a patent for improved metal-insulator-metal structures.

{
  "signal_id": "0f72c73c-4e36-5e6e-b063-a5b9023424e6",
  "signal_type": "patents-company",
  "signal_subtype": "patentGrant",
  "detected_at": "2026-09-30T17:48:42+00:00",
  "company": {
    "name": "TSMC",
    "domain": "tsmc.com"
  },
  "data": {
    "cpc": [
      {
        "code": "H10W 20/496"
      },
      {
        "code": "H10D 1/042",
        "label": "Inorganic electric semiconductor devices (2025 CPC reorg of parts of H01L)"
      },
      {
        "code": "H10D 1/716",
        "label": "Inorganic electric semiconductor devices (2025 CPC reorg of parts of H01L)"
      },
      {
        "code": "H10W 20/033"
      },
      {
        "code": "H10W 20/048"
      }
    ],
    "tags": [
      "Intellectual Property",
      "Research & Development",
      "Engineering",
      "Manufacturing Operations"
    ],
    "detail": "In September 2026 TSMC patented a semiconductor fabrication process for producing higher-capacitance MIM structures with fewer voids in integrated circuits.",
    "summary": "TSMC was granted a patent for improved metal-insulator-metal structures.",
    "event_at": "2026-09-29",
    "inventors": [
      {
        "name": "Chung-Liang Cheng",
        "status": "unresolved",
        "is_primary": true
      },
      {
        "name": "Sheng-Chau Chen",
        "status": "unresolved",
        "is_primary": false
      }
    ],
    "event_kind": "grant_date",
    "grant_date": "2026-09-29",
    "source_url": "https://patents.google.com/patent/US12751283",
    "cpc_primary": {
      "code": "H10W 20/496"
    },
    "patent_title": "Metal-insulator-metal structures and methods of forming the same",
    "patent_number": "US12751283",
    "uspto_assignee": "Taiwan Semiconductor Manufacturing Company, Ltd.",
    "patent_abstract": "Forming a barrier layer and removing the barrier layer from an upper portion of a recess in which a metal-insulator-metal (MIM) structure will be formed allows for forming the MIM structure with fewer voids, which improves capacitance of the MIM structure. For example, a bottom layer anti-reflective coating may be deposited and etched back in order to allow for removal of the barrier layer from the upper portion of the recess but not from a bottom portion of the recess. Additionally, the barrier layer may be formed using physical vapor deposition, which reduces carbon impurities in the barrier layer as compared with using atomic layer deposition, which improves resistance for the MIM structure.",
    "precision_class": "structural",
    "invention_explanation": "A manufacturing method that selectively removes a barrier layer near the top of a tiny recess so the finished capacitor fills more completely and performs better.",
    "technologies_mentioned": [
      "semiconductor fabrication",
      "MIM capacitors",
      "thin-film deposition",
      "etching"
    ]
  }
}

curl https://signals.autobound.ai/v1/signals/0f72c73c-4e36-5e6e-b063-a5b9023424e6 \
  -H "X-API-KEY: $AUTOBOUND_API_KEY"

curl -X POST https://signals.autobound.ai/v1/companies/enrich \
  -H "X-API-KEY: $AUTOBOUND_API_KEY" \
  -H "Content-Type: application/json" \
  -d '{"domain":"tsmc.com","limit":20}'